std_detect/detect/arch/
x86.rs

1//! This module implements minimal run-time feature detection for x86.
2//!
3//! The features are detected using the `detect_features` function below.
4//! This function uses the CPUID instruction to read the feature flags from the
5//! CPU and encodes them in a `usize` where each bit position represents
6//! whether a feature is available (bit is set) or unavailable (bit is cleared).
7//!
8//! The enum `Feature` is used to map bit positions to feature names, and the
9//! the `__crate::detect::check_for!` macro is used to map string literals (e.g.,
10//! "avx") to these bit positions (e.g., `Feature::avx`).
11//!
12//! The run-time feature detection is performed by the
13//! `__crate::detect::check_for(Feature) -> bool` function. On its first call,
14//! this functions queries the CPU for the available features and stores them
15//! in a global `AtomicUsize` variable. The query is performed by just checking
16//! whether the feature bit in this global variable is set or cleared.
17
18features! {
19    @TARGET: x86;
20    @CFG: any(target_arch = "x86", target_arch = "x86_64");
21    @MACRO_NAME: is_x86_feature_detected;
22    @MACRO_ATTRS:
23    /// A macro to test at *runtime* whether a CPU feature is available on
24    /// x86/x86-64 platforms.
25    ///
26    /// This macro is provided in the standard library and will detect at runtime
27    /// whether the specified CPU feature is detected. This does **not** resolve at
28    /// compile time unless the specified feature is already enabled for the entire
29    /// crate. Runtime detection currently relies mostly on the `cpuid` instruction.
30    ///
31    /// This macro only takes one argument which is a string literal of the feature
32    /// being tested for. The feature names supported are the lowercase versions of
33    /// the ones defined by Intel in [their documentation][docs].
34    ///
35    /// ## Supported arguments
36    ///
37    /// This macro supports the same names that `#[target_feature]` supports. Unlike
38    /// `#[target_feature]`, however, this macro does not support names separated
39    /// with a comma. Instead testing for multiple features must be done through
40    /// separate macro invocations for now.
41    ///
42    /// Supported arguments are:
43    ///
44    /// * `"aes"`
45    /// * `"pclmulqdq"`
46    /// * `"rdrand"`
47    /// * `"rdseed"`
48    /// * `"tsc"`
49    /// * `"mmx"`
50    /// * `"sse"`
51    /// * `"sse2"`
52    /// * `"sse3"`
53    /// * `"ssse3"`
54    /// * `"sse4.1"`
55    /// * `"sse4.2"`
56    /// * `"sse4a"`
57    /// * `"sha"`
58    /// * `"avx"`
59    /// * `"avx2"`
60    /// * `"sha512"`
61    /// * `"sm3"`
62    /// * `"sm4"`
63    /// * `"avx512f"`
64    /// * `"avx512cd"`
65    /// * `"avx512er"`
66    /// * `"avx512pf"`
67    /// * `"avx512bw"`
68    /// * `"avx512dq"`
69    /// * `"avx512vl"`
70    /// * `"avx512ifma"`
71    /// * `"avx512vbmi"`
72    /// * `"avx512vpopcntdq"`
73    /// * `"avx512vbmi2"`
74    /// * `"gfni"`
75    /// * `"vaes"`
76    /// * `"vpclmulqdq"`
77    /// * `"avx512vnni"`
78    /// * `"avx512bitalg"`
79    /// * `"avx512bf16"`
80    /// * `"avx512vp2intersect"`
81    /// * `"avx512fp16"`
82    /// * `"avxvnni"`
83    /// * `"avxifma"`
84    /// * `"avxneconvert"`
85    /// * `"avxvnniint8"`
86    /// * `"avxvnniint16"`
87    /// * `"amx-tile"`
88    /// * `"amx-int8"`
89    /// * `"amx-bf16"`
90    /// * `"amx-fp16"`
91    /// * `"amx-complex"`
92    /// * `"amx-avx512"`
93    /// * `"amx-fp8"`
94    /// * `"amx-movrs"`
95    /// * `"amx-tf32"`
96    /// * `"f16c"`
97    /// * `"fma"`
98    /// * `"bmi1"`
99    /// * `"bmi2"`
100    /// * `"abm"`
101    /// * `"lzcnt"`
102    /// * `"tbm"`
103    /// * `"popcnt"`
104    /// * `"fxsr"`
105    /// * `"xsave"`
106    /// * `"xsaveopt"`
107    /// * `"xsaves"`
108    /// * `"xsavec"`
109    /// * `"cmpxchg16b"`
110    /// * `"kl"`
111    /// * `"widekl"`
112    /// * `"adx"`
113    /// * `"rtm"`
114    /// * `"movbe"`
115    /// * `"ermsb"`
116    /// * `"movrs"`
117    /// * `"xop"`
118    ///
119    /// [docs]: https://software.intel.com/sites/landingpage/IntrinsicsGuide
120    #[stable(feature = "simd_x86", since = "1.27.0")]
121    @BIND_FEATURE_NAME: "abm"; "lzcnt"; // abm is a synonym for lzcnt
122    @BIND_FEATURE_NAME: "avx512gfni"; "gfni"; #[deprecated(since = "1.67.0", note = "the `avx512gfni` feature has been renamed to `gfni`")];
123    @BIND_FEATURE_NAME: "avx512vaes"; "vaes"; #[deprecated(since = "1.67.0", note = "the `avx512vaes` feature has been renamed to `vaes`")];
124    @BIND_FEATURE_NAME: "avx512vpclmulqdq"; "vpclmulqdq"; #[deprecated(since = "1.67.0", note = "the `avx512vpclmulqdq` feature has been renamed to `vpclmulqdq`")];
125    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] aes: "aes";
126    /// AES (Advanced Encryption Standard New Instructions AES-NI)
127    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] pclmulqdq: "pclmulqdq";
128    /// CLMUL (Carry-less Multiplication)
129    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] rdrand: "rdrand";
130    /// RDRAND
131    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] rdseed: "rdseed";
132    /// RDSEED
133    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] tsc: "tsc";
134    without cfg check: true;
135    /// TSC (Time Stamp Counter)
136    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] mmx: "mmx";
137    without cfg check: true;
138    /// MMX (MultiMedia eXtensions)
139    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse: "sse";
140    /// SSE (Streaming SIMD Extensions)
141    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse2: "sse2";
142    /// SSE2 (Streaming SIMD Extensions 2)
143    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse3: "sse3";
144    /// SSE3 (Streaming SIMD Extensions 3)
145    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] ssse3: "ssse3";
146    /// SSSE3 (Supplemental Streaming SIMD Extensions 3)
147    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse4_1: "sse4.1";
148    /// SSE4.1 (Streaming SIMD Extensions 4.1)
149    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse4_2: "sse4.2";
150    /// SSE4.2 (Streaming SIMD Extensions 4.2)
151    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sse4a: "sse4a";
152    /// SSE4a (Streaming SIMD Extensions 4a)
153    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] sha: "sha";
154    /// SHA
155    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx: "avx";
156    /// AVX (Advanced Vector Extensions)
157    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx2: "avx2";
158    /// AVX2 (Advanced Vector Extensions 2)
159    @FEATURE: #[stable(feature = "sha512_sm_x86", since = "1.89.0")] sha512: "sha512";
160    /// SHA512
161    @FEATURE: #[stable(feature = "sha512_sm_x86", since = "1.89.0")] sm3: "sm3";
162    /// SM3
163    @FEATURE: #[stable(feature = "sha512_sm_x86", since = "1.89.0")] sm4: "sm4";
164    /// SM4
165    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512f: "avx512f" ;
166    /// AVX-512 F (Foundation)
167    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512cd: "avx512cd" ;
168    /// AVX-512 CD (Conflict Detection Instructions)
169    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512er: "avx512er";
170    without cfg check: true;
171    /// AVX-512 ER (Expo nential and Reciprocal Instructions)
172    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512pf: "avx512pf";
173    without cfg check: true;
174    /// AVX-512 PF (Prefetch Instructions)
175    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512bw: "avx512bw";
176    /// AVX-512 BW (Byte and Word Instructions)
177    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512dq: "avx512dq";
178    /// AVX-512 DQ (Doubleword and Quadword)
179    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vl: "avx512vl";
180    /// AVX-512 VL (Vector Length Extensions)
181    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512ifma: "avx512ifma";
182    /// AVX-512 IFMA (Integer Fused Multiply Add)
183    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vbmi: "avx512vbmi";
184    /// AVX-512 VBMI (Vector Byte Manipulation Instructions)
185    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vpopcntdq: "avx512vpopcntdq";
186    /// AVX-512 VPOPCNTDQ (Vector Population Count Doubleword and Quadword)
187    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vbmi2: "avx512vbmi2";
188    /// AVX-512 VBMI2 (Additional byte, word, dword and qword capabilities)
189    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] gfni: "gfni";
190    /// AVX-512 GFNI (Galois Field New Instruction)
191    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] vaes: "vaes";
192    /// AVX-512 VAES (Vector AES instruction)
193    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] vpclmulqdq: "vpclmulqdq";
194    /// AVX-512 VPCLMULQDQ (Vector PCLMULQDQ instructions)
195    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vnni: "avx512vnni";
196    /// AVX-512 VNNI (Vector Neural Network Instructions)
197    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512bitalg: "avx512bitalg";
198    /// AVX-512 BITALG (Support for VPOPCNT\[B,W\] and VPSHUFBITQMB)
199    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512bf16: "avx512bf16";
200    /// AVX-512 BF16 (BFLOAT16 instructions)
201    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vp2intersect: "avx512vp2intersect";
202    /// AVX-512 P2INTERSECT
203    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512fp16: "avx512fp16";
204    /// AVX-512 FP16 (FLOAT16 instructions)
205    @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxifma: "avxifma";
206    /// AVX-IFMA (Integer Fused Multiply Add)
207    @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxneconvert: "avxneconvert";
208    /// AVX-NE-CONVERT (Exceptionless Convert)
209    @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxvnni: "avxvnni";
210    /// AVX-VNNI (Vector Neural Network Instructions)
211    @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxvnniint16: "avxvnniint16";
212    /// AVX-VNNI_INT8 (VNNI with 16-bit Integers)
213    @FEATURE: #[stable(feature = "avx512_target_feature", since = "1.89.0")] avxvnniint8: "avxvnniint8";
214    /// AVX-VNNI_INT16 (VNNI with 8-bit integers)
215    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_tile: "amx-tile";
216    /// AMX (Advanced Matrix Extensions) - Tile load/store
217    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_int8: "amx-int8";
218    /// AMX-INT8 (Operations on 8-bit integers)
219    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_bf16: "amx-bf16";
220    /// AMX-BF16 (BFloat16 Operations)
221    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_fp16: "amx-fp16";
222    /// AMX-FP16 (Float16 Operations)
223    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_complex: "amx-complex";
224    /// AMX-COMPLEX (Complex number Operations)
225    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_avx512: "amx-avx512";
226    /// AMX-AVX512 (AVX512 operations extended to matrices)
227    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_fp8: "amx-fp8";
228    /// AMX-FP8 (Float8 Operations)
229    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_movrs: "amx-movrs";
230    /// AMX-MOVRS (Matrix MOVERS operations)
231    @FEATURE: #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] amx_tf32: "amx-tf32";
232    /// AMX-TF32 (TensorFloat32 Operations)
233    @FEATURE: #[unstable(feature = "apx_target_feature", issue = "139284")] apxf: "apxf";
234    /// APX-F (Advanced Performance Extensions - Foundation)
235    @FEATURE: #[unstable(feature = "avx10_target_feature", issue = "138843")] avx10_1: "avx10.1";
236    /// AVX10.1
237    @FEATURE: #[unstable(feature = "avx10_target_feature", issue = "138843")] avx10_2: "avx10.2";
238    /// AVX10.2
239    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] f16c: "f16c";
240    /// F16C (Conversions between IEEE-754 `binary16` and `binary32` formats)
241    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] fma: "fma";
242    /// FMA (Fused Multiply Add)
243    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] bmi1: "bmi1" ;
244    /// BMI1 (Bit Manipulation Instructions 1)
245    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] bmi2: "bmi2" ;
246    /// BMI2 (Bit Manipulation Instructions 2)
247    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] lzcnt: "lzcnt";
248    /// ABM (Advanced Bit Manipulation) / LZCNT (Leading Zero Count)
249    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] tbm: "tbm";
250    /// TBM (Trailing Bit Manipulation)
251    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] popcnt: "popcnt";
252    /// POPCNT (Population Count)
253    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] fxsr: "fxsr";
254    /// FXSR (Floating-point context fast save and restore)
255    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsave: "xsave";
256    /// XSAVE (Save Processor Extended States)
257    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsaveopt: "xsaveopt";
258    /// XSAVEOPT (Save Processor Extended States Optimized)
259    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsaves: "xsaves";
260    /// XSAVES (Save Processor Extended States Supervisor)
261    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsavec: "xsavec";
262    /// XSAVEC (Save Processor Extended States Compacted)
263    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] cmpxchg16b: "cmpxchg16b";
264    /// CMPXCH16B (16-byte compare-and-swap instruction)
265    @FEATURE: #[stable(feature = "keylocker_x86", since = "1.89.0")] kl: "kl";
266    /// Intel Key Locker
267    @FEATURE: #[stable(feature = "keylocker_x86", since = "1.89.0")] widekl: "widekl";
268    /// Intel Key Locker Wide
269    @FEATURE: #[stable(feature = "simd_x86_adx", since = "1.33.0")] adx: "adx";
270    /// ADX, Intel ADX (Multi-Precision Add-Carry Instruction Extensions)
271    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] rtm: "rtm";
272    /// RTM, Intel (Restricted Transactional Memory)
273    @FEATURE: #[stable(feature = "movbe_target_feature", since = "1.67.0")] movbe: "movbe";
274    /// MOVBE (Move Data After Swapping Bytes)
275    @FEATURE: #[unstable(feature = "movrs_target_feature", issue = "137976")] movrs: "movrs";
276    /// MOVRS (Move data with the read-shared hint)
277    @FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] ermsb: "ermsb";
278    /// ERMSB, Enhanced REP MOVSB and STOSB
279    @FEATURE: #[unstable(feature = "xop_target_feature", issue = "127208")] xop: "xop";
280    /// XOP: eXtended Operations (AMD)
281}
std_detect/detect/arch/x86.rs

std_detect/detect/arch/
x86.rs
